通用
| 架构 | SAR |
|---|---|
| 配置 | MUX-S/H-ADC |
| Data Interface | Parallel |
| 特性 | Selectable Address |
| 输入类型 | Differential, Pseudo-Differential, Single Ended |
| 制造商 | Linear Technology |
| Number of Bits | 10 |
| Number of Inputs | 8 |
| Product Status | Obsolete |
| Ratio - S/H | ADC: 1:1 |
| 基准类型 | External, Internal |
| 采样率 | 1.25M |