通用
| 架构 | Pipelined |
|---|---|
| 配置 | S/H-ADC |
| Data Interface | LVDS - Serial |
| 特性 | Simultaneous Sampling |
| 输入类型 | Differential, Single Ended |
| 制造商 | Analog Devices Inc. |
| Number of Bits | 12 |
| Number of Inputs | 8, 16 |
| Product Status | Active |
| Ratio - S/H | ADC: 1:1 |
| 基准类型 | External, Internal |
| 采样率 | 40M |