Allgemein
| Architektur | SAR |
|---|---|
| Konfiguration | S/H-MUX-ADC |
| Data Interface | LVDS - Serial, SPI |
| Merkmale | Simultaneous Sampling |
| Eingangstyp | Differential, Pseudo-Differential, Single Ended |
| Hersteller | Linear Technology |
| Number of Bits | 18 |
| Number of Inputs | 2 |
| Product Status | Obsolete |
| Ratio - S/H | ADC: 2:1 |
| Referenztyp | External, Internal |
| Abtastrate | 666k |